Overview of Device Physics Research

Yasuo Takahashi
Device Physics Laboratory

 Nanotechnology will be a key role in achieving the future multimedia society. Although recent progress in information technology has been supported by the progress in Si LSI technologies, energy dissipation in small Si chips has become a critical issue because of the increasing number of transistors. For personal information tools, it is important to develop new compact hardware that operates on new principles and consumes extremely low power. The Device Physics Laboratory conducts research on single electronics, which enable us to make small and ultimately low-power devices. For nanostructure fabrication, we are working to refine lithographic techniques (top-down approach), and investigating self-assembly based on the atomic structures of the substrate (bottom-up approach). We are also examining other methods to create various nanostructures, such as carbon nanotubes.
 The Si Nanodevice Research Group is investigating the operation mechanism of Si single-electron transistors (SETs) and their circuit applications and seeking to establish fabrication principles. SETs have special features that conventional transistors do not have. One is the capability of attaching many input gates to them, and another is their applicability to multiple-valued operation. By using these features, we have demonstrated effective arithmetic circuits operating based on multiple-valued logic and showed their rather high-speed and low-power consumption nature. We have also demonstrated multiple valued memory by using one-by-one electron transfer and a highly sensitive single-electron detection device. A key issue in making Si SETs is the oxidation reaction. To clarify their fundamental mechanisms we have conducted experimental and theoretical investigation considering atomic level processes, and performed simulations of the oxidation rate based on the newly proposed mechanisms.
 The Nanostructure Technology Research Group is investigating top-down nanofabrication techniques based on electron-beam lithography. One of the important issues for nanofabrication is pattern fluctuation. We have clarified the basis of ultrafine-pattern formation by using new resist materials and have established a new supercritical-fluid drying process to make high-aspect-ratio patterns. This led to the demonstration of high-temperature operating SETs. Recently, we have expanded these two-dimensional nanofabrication technologies to three-dimensional ones by using a specially designed sample-rotation system inserted into an electron-beam lithography apparatus. As a demonstration of this new technology, we have created a nano-globe by a world map on a 60-μm sphere with 10-nm resolution. We have also succeeded in making four-point-probe nano-system for conductance measurement of small structures by using focused-ion-beam technology.
 The Surface Science Research Group is investigating wafer-scale control of ordered nanostructure formation based on the bottom-up approach. We have conducted experimental and theoretical studies of the flow of surface atomic steps on the Si surface to control the self-assembled nanostructures. We have also developed the method for the real time observation of the atomic reformation on the surface by using low energy electron microscopy (LEEM). Our research on carbon nanotubes has led to a new low temperature growth technique. We have succeeded in controlling the diameter of the grown nanotubes and established the method to evaluate the electrical states and structures of nanotubes by using Raman spectroscopy, photoluminescence, and photoelectron spectroscopy. We have also succeeded the vertically aligned InP nanowire growth by using the vapor-liquid-solid mechanism with gold nanoparticles as a catalyst.
 The details of some of our achievements are shown in the following four pages.

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