Si Nanowire Ion-sensitive Field-effect Transistors with a Shared Floating Gate


Katsuhiko Nishiguchi, Toru Yamaguchi, and Akira Fujiwara
Physical Science Laboratory

 Ion-sensitive field-effect transistors (ISFETs) are one of the most powerful tools for biotechnology and molecular engineering because they promise high integrability, good miniaturization, and high-speed sensing. More interestingly and importantly, nanoscale ISFETs have sensitivity high enough to detect single electrons at room temperature [1]. On the other hand, a serious issue with ISFETs, which are usually used in ionized and/or charged impurities distributed randomly in a liquid, is background noise. The background noise disturbs the precise detection of small amounts of material, which hinders precise molecular detection. In this study, in an attempt to distinguish a target signal from background noise, we fabricated nanoscale Si-based ISFETs, which are arrayed in parallel and share one floating gate [2].
 The ISFET’s channels with a constriction part were patterned on a silicon-on-insulator (SOI) wafer (Fig. 1). A subsequent oxidation process shrunk the constriction of the channel, which gives ISFETs high charge sensitivity with single-electron resolution [1]. Au and Ti wires were formed simultaneously on three constrictions by a well-aligned lift-off process using electron-beam lithography. As a substance for detection, we used octadecane thiol (ODT) solved in a tetrahydrofuran (THF). THF with an ODT was dripped onto the ISFETs with a dropper and the characteristics of the current, I1, I2, I3, and I4, flowing through the four constrictions in one device were measured.
After complete evaporation of the THF droplet, current characteristics as a function of back-gate voltage shifted according to the concentration of ODT. This means that the fabricated devices work as an ISFET to detect negatively charged ODT on the devices.
 Next, we monitored I1, I2, I3, and I4 in real time when THF with an ODT was supplied (Fig. 2). Although all curves seem to change individually, I1, I2, and I3 show mutually synchronized step-wise changes as indicated by arrows, whereas I1 changes individually. This means that the Au wire covering the channels for I2, I3, and I4 is covered with ODT and therefore gives those synchronized changes due to its capacitive coupling to the channels. That is, although each curve individually has background noise or current caused by the THF, ODT, and FETs themselves, real-time monitoring of I1, I2, I3, and I4 allows us to make a distinction between such background noise and an effect caused by materials attached to the Au wire. The presented schame is promising for a noise-robust sensor.

[1] K. Nishiguchi, Jpn. J. Appl. Phys. 47 (2008) 8305.
[2] K. Nishiguchi, Appl. Phys. Lett. 94 (2009) 163106.

Fig. 1. Device structure of the ISFETs with a shared floating gate.
(a) Scanning electron microscope. (b) schematic view.
Fig. 2. Change in current flowing through
ISFETs when the THF with ODT was

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