Nanodevice's group Physical Science Laboratory NTT Basic Research Laboratories

	Phonon-cavity electromechanics
Nature Physics doi:10.1038/nphys2277
I. Mahboob, K. Nishiguchi, H. Okamoto, and H. Yamaguchi
	[ABSTRACT]Photonic cavities have emerged as an indispensable tool to control and manipulate harmonic motion in opto/electromechanical systems. Invariably, in these systems a high-quality-factor photonic mode is parametrically coupled to a high-quality-factor mechanical oscillation mode. This entails the demanding challenges of either combining two physically distinct systems, or else optimizing the same nanostructure for both mechanical and optical properties. In contrast to these approaches, here we show that the cavity can be realized by the second oscillation mode of the same mechanical oscillator. A piezoelectric pump generates strain-induced parametric coupling between the first and the second mode at a rate that can exceed their intrinsic relaxation rate. This leads to a mechanically induced transparency in the second mode which plays the role of the phonon cavity, the emergence of parametric normal-mode splittingand the ability to cool the first mode. Thus, the mechanical oscillator can now be completely manipulated by a phonon cavity

	Tuneable electromechanical comb generation
Appl. Phys. Lett. vol. 100, p. 113109 (2012)
I. Mahboob, Q. Wilmart, K. Nishiguchi, A. Fujiwara, and H. Yamaguchi
	[ABSTRACT]An array of equally spaced oscillations or a comb is created within the bandwidth of the fundamental mode of an electromechanical resonator. This phenomenon utilises 2 continuous-wave (CW) pump excitations that piezoelectrically modulate the tension in the mechanical element and is seeded by a CW harmonic excitation of the first mode i.e., the signal. The resultant comb can be dynamically manipulated via the pumps and signal where the teeth separation can be tuned over 3 orders of magnitude and the comb density can be increased from just 2 teeth to nearly 10^2. (c) 2012 American Institute of Physics

	Bound exciton photoluminescence from ion-implanted phosphorus in thin silicon layers
Optics Express, vol. 19, p. 25255 (2011).
H. Sumikura, K. Nishiguchi, Y. Ono, A. Fujiwara, and M. Notomi
	[ABSTRACT]We report the observation of clear bound exciton (BE) emission from ion-implanted phosphorus. Shallow implantation and high-temperature annealing successfully introduce active donors into thin silicon layers. The BE emission at a wavelength of 1079 nm shows that a part of the implanted donors are definitely activated and isolated from each other. However, photoluminescence and electron spin resonance studies find a cluster state of the activated donors. The BE emission is suppressed by this cluster state rather than the nonradiative processes caused by ion implantation. Our results provide important information about ion implantation for doping quantum devices with phosphorus quantum bits. (c) 2011 OSA

	Wide-band idler generation in a GaAs electromechanical resonator
Phys. Rev. B, vol. 84, p. 113411 (2011).
I. Mahboob, Q. Wilmart, K. Nishiguchi, A. Fujiwara, and H. Yamaguchi
	[ABSTRACT]Periodically modulating the piezoelectrically introduced strain in an electromechanical resonator can enable the fundamental (ω0) and the first modes (ω1) to be coupled. This is explicitly demonstrated with the creation of a mechanical idler at ω1 (ω0) when a signal excitation is applied at ω0 (ω1) and a pump excitation is applied at ω0+ω1. The dynamics of the mechanical idler generation are captured by a simple phenomenological model and our experimental demonstration paves the way toward accessing the diverse functionality of nonlinear optics in an on-chip electromechanical platform.

	Large Array of Sub-10-nm Single-Grain Au Nanodots for use in Nanotechnology
Small, DOI: 10.1002/smll.201100915 (2011).
N. Clement, G. Patriarche, K. Smaali, F. Vaurette, K. Nishiguchi, D. Troadec, A. Fujiwara, D. Vuillaume
	[ABSTRACT]A uniform array of single-grain Au nanodots, as small as 5--8 nm, can be formed on silicon using e-beam lithography. The as-fabricated nanodots are amorphous, and thermal annealing converts them to pure Au single crystals covered with a thin SiO2 layer. These findings are based on physical measurements, such as atomic force microscopy (AFM), atomic-resolution scanning transmission electron microscopy, and chemical techniques using energy dispersive X-ray spectroscopy. A self-assembled organic monolayer is grafted on the nanodots and characterized chemically with nanometric lateral resolution. The extended uniform array of nanodots is used as a new test-bed for molecular electronic devices.

	Strong Stark effect in electroluminescence from phosphorous-doped silicon-on-insulator metal-oxide-semiconductor field-effect transistors
Appl. Phys. Lett., vol. 98, p. 033503 (2011).
J. Noborisaka, K. Nishiguchi, Y. Ono, H. Kageshima, and A. Fujiwara
	[ABSTRACT] We report a strong Stark effect in electroluminescence (EL) from thin silicon-on-insulator metal-oxide-semiconductor field-effect transistors. The EL peak shows a large Stark shift of up to 50 meV when a gate-induced electric field is applied. Such a large shift is observed because of the strong confinement of carriers by a Si/SiO2 quantum well. Furthermore, we observe a sudden decrease of EL intensity at a specific electric field. This feature is ascribed to electron dissociation from phosphorous atom to subbands in a triangular well at the Si/SiO2 interface by the applied electric field. c 2011 American Institute of Physics

	Interconnect-free parallel logic circuits in a single mechanical resonator
Nature Communications, v. 2, DOI:10.1038/ncomms1201 (2011).
I. Mahboob, E. Flurin, K. Nishiguchi, A. Fujiwara, and H. Yamaguchi
	[ABSTRACT] In conventional computers, wiring between transistors is required to enable the execution of Boolean logic functions. This has resulted in processors in which billions of transistors are physically interconnected, which limits integration densities, gives rise to huge power consumption and restricts processing speeds. A method to eliminate wiring amongst transistors by condensing Boolean logic into a single active element is thus highly desirable. Here, we demonstrate a novel logic architecture using only a single electromechanical parametric resonator into which multiple channels of binary information are encoded as mechanical oscillations at different frequencies. The parametric resonator can mix these channels, resulting in new mechanical oscillation states that enable the construction of AND, OR and XOR logic gates as well as multibit logic circuits. Moreover, the mechanical logic gates and circuits can be executed simultaneously, giving rise to the prospect of a parallel logic processor in just a single mechanical resonator.

	Enhanced force sensitivity and noise squeezing in an electromechanical resonator coupled to a nanotransistor
Appl. Phys. Lett., vol. 97, p. 253105 (2010).
I. Mahboob, E. Flurin, K. Nishiguchi, A. Fujiwara, and H. Yamaguchi
	[ABSTRACT] A nanofield-effect transistor (nano-FET) is coupled to a massive piezoelectricity based electromechanical resonator integrated with a parametric amplifier. The mechanical parametric amplifier can enhance the resonator’s displacement and the resulting electrical signal is further amplified by the nano-FET. This hybrid amplification scheme yields an increase in the mechanical displacement signal by 70 dB resulting in a force sensitivity of 200 aNHz^-1/2 at 3 K. The mechanical parametric amplifier can also squeeze the displacement noise in one oscillation phase by 5 dB enabling a factor of 4 reduction in the thermomechanical noise force level. c 2010 American Institute of Physics

	Separately contacted monocrystalline silicon double-layer structure with an amorphous silicon dioxide barrier made by wafer bonding
Semiconductor Science and Technology, vol. 25, p. 125001 (2010)
K. Takashina, M. Nagase, K. Nishiguchi, Y. Ono, H. Omi, A. Fujiwara, T. Fujisawa, and K. Muraki
	[ABSTRACT] A double layer of monocrystalline silicon separated by a 23.5 nm silicon dioxide barrier is fabricated by bonding two silicon-on-insulator wafers with oxidized surface layers. The two layers are separately contacted allowing transport measurements through individual layers and a bias voltage to be applied between the layers. Four-terminal magnetotransport measurements at cryogenic temperatures on electrons generated close to the central oxide barrier show reasonable mobility.

	Tunneling spectroscopy of electron subbands in thin silicon-on-insulator metal-oxide-semiconductor field-effect transistors
Appl. Phys. Lett., vol. 96, p. 112102 (2010).
J. Noborisaka, K. Nishiguchi, H. Kageshima, Y. Ono, and A. Fujiwara
	[ABSTRACT] We report the tunneling spectroscopy of thin silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors with tunneling gate oxide. When electrons are injected into a thin SOI well, the gate-tunneling current shows kink structures originating from quantized energy levels in the SOI well. From the theoretical consideration of the energy levels and their density of states, the observed features can be ascribed to electron tunneling into the in-plane fourfold degenerate valley subbands. Furthermore, inhomogeneous peak broadening of the kink structures in the experiment is well explained by the SOI thickness variation. c 2010 American Institute of Physics

	Room temperature piezoelectric displacement detection via a silicon field effect transistor
Appl. Phys. Lett., vol. 95, p. 233102 (2009).
I. Mahboob, K. Nishiguchi, A. Fujiwara, and H. Yamaguchi
	[ABSTRACT] An electromechanical oscillator embedded with a two dimensional electron gas is capacitively coupled to a silicon field effect transistor (Si-FET). The piezovoltage induced by the mechanical motion modulates the current passing through the Si-FET enabling the electromechanical oscillator’s position to be monitored. When the Si-FET is biased at its optimal point, the motion induced piezovoltage can be amplified resulting in a displacement sensitivity of 6×10^-12 mHz^-1/2 for a 131 kHz GaAs resonator which is among the highest recorded for an all-electrical room temperature detection scheme. c 2009 American Institute of Physics

	Low power and fast electro-optic silicon modulator with lateral p-i-n embedded photonic crystal nanocavity
Optics Express, vol. 17, 22505-22513 (2009)
T. Tanabe, K. Nishiguchi, E. Kuramochi, and M. Notomi
	[ABSTRACT] We have fabricated high-Q photonic crystal nanocavities with a lateral p-i-n structure to demonstrate low-power and high-speed electro-optic modulation in a silicon chip. GHz operation is demonstrated at a very low (μW level) operating power, which is about 4.6 times lower than that reported for other cavities in silicon. This low-power operation is due to the small size and high-Q of the photonic crystal nanocavity. c 2009 OSA

	Horizontal position analysis of single acceptors in Si nanoscale field-effect transistors
Appl. Phys. Lett., vol. 94, 223501 (2009)
M. A. H. Khalafalla, Y. Ono, K. Nishiguchi, and A. Fujiwara
	[ABSTRACT] The authors performed conductance measurements to identify the horizontal position of single boron acceptors in silicon-on-insulator nanoscale field-effect transistors at a temperature of 6 K. The horizontal position, i.e., how far the acceptor is from the source or drain terminal, is qualitatively obtained, and it is shown, on the level of single dopants, that the acceptor near the source significantly affects the subthreshold nature of the transistor. c 2009 American Institute of Physics

	Electrons and holes in a 40 nm thick silicon slab at cryogenic temperatures
Appl. Phys. Lett., vol. 94, 142104 (2009)
K. Takashina, K. Nishiguchi, Y. Ono, A. Fujiwara, T. Fujisawa, Y. Hirayama, and K. Muraki
	[ABSTRACT] We demonstrate low temperature operation of an electron-hole bilayer device based on a 40 nm thick layer of silicon in which electrons and holes can be simultaneously induced and contacted independently. The device allows the application of bias between the electrons and holes enhancing controllability over density and confining potential. We confirm that drag measurements are possible with the structure. c 2009 American Institute of Physics

	Low-energy electron emission from an electron inversion layer of a Si/SiO2/Si cathode for nano-decomposition
Jpn. J. Appl. Phys., vol. 47, pp. 5106-5108 (2008).		Electron emission from mos structure
K. Nishiguchi, M. Nagase, T. Yamaguchi, A. Fujiwara, and H. Yamaguchi
	[ABSTRACT] We fabricated an electron-emission cathode with a Si/SiO2/Si structure using metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication technology. Electrons travel from an electron-source Si layer to a thin polycrystalline Si (poly-Si) through a thin SiO2 and some of them with high energy, i.e., hot electrons, are emitted from the poly-Si surface. By utilizing an electron-inversion layer as the electron source, high efficiency and stability of electron emission were achieved. Material decomposition at a depth of a few nanometers was also demonstrated using a low-energy-electron irradiation from the cathode operated in a low vacuum condition.

	Long retention of gain-cell dynamic random-access memory with undoped memory node
IEEE Electron Device Lett. vol. 28, pp. 48-50 (2007).		Memory operation with long retention
K. Nishiguchi, A. Fujiwara, Y. Ono, H. Inokawa, and Y. Takahashi
	[ABSTRACT] Low current leakage characteristics of a novel silicon-on-insulator (SOI) device are investigated in view of application to a gain-cell dynamic random access memory (DRAM). The device consists of a two-layered poly-Si gate. Since, in this device, the memory node is electrically formed by the gate in undoped SOI wire, no p-n junction is required. The retention is found to be dominated by the subthreshold leakage, which leads to long data retention. The device also achieved a fast (10 ns) writing time and its fabrication process is compatible with those of SOI MOSFETs. The present results, thus, strongly suggest a way of conducting a gain-cell DRAM to be embedded into logic circuits.

	Fast All-Optical Switching using Ion-Implanted Silicon Photonic Crystal Nanocavities
Appl. Phys. Lett., vol. 90, 031115 (2007)
T. Tanabe, K. Nishiguchi, A. Shinya, E. Kuramochi, H. Inokawa, and M. Notomi
	[ABSTRACT] On-chip all-optical switching based on the carrier plasma dispersion in an argon ion (Ar+) implanted photonic crystal (PhC) nanocavity that is connected to input/output waveguides is described. A high dose of Ar+ is introduced, and annealing is used to recrystallize the silicon and thus create dislocation loops at the center of the PhC slab. Dislocation loops enable the fast recombination of the carriers, which allows a fast switching recovery time for PhC switches. The switching window is threehr times smaller than that without ion implantation, while the required operating energy remains almost the same (<100 fJ). c 2007 American Instituteu of Physics

	Impurity conduction in phosphorus-doped buried-channel silicon-on-insulator field-effect　transistors at temperatures between 10 and 295 K
Phys. Rev. B, vol. 74, p. 235317 (2006)
Y. Ono, J-F Morizur, K. Nishiguchi, K. Takashina, and H. Yamaguchi
	[ABSTRACT] Received 27 July 2006; revised 21 October 2006; published 14 December 2006 We investigate transport in phosphorus-doped buried-channel metal-oxide-semiconductor field-effect transistors at temperatures between 10 and 295 K. We focus on transistors with phosphorus donor concentrations higher than those previously studied, where we expect conduction to rely on donor electrons rather than conduction-band electrons. In a range of doping concentration between around 2.1 and 8.7×10^17 cm^-3, we find that a clear peak emerges in the conductance versus gate-voltage curves at low temperature. In addition, temperature dependence measurements reveal that the conductance obeys a variable-range-hopping law up to an unexpectedly high temperature of over 100 K. The symmetric dual-gate configuration of the silicon-on-insulator we use allows us to fully characterize the vertical-bias dependence of the conductance. Comparison to computer simulation of the phosphorus impurity band depth profile reveals how the spatial variation of the impurity-band energy determines the hopping conduction in transistor structures. We conclude that the emergence of the conductance peak and the high-temperature variable-range hopping originate from the band bending and its change by the gate bias. Moreover, the peak structure is found to be strongly related to the density of states (DOS) of the phosphorus impurity band, suggesting the possibility of performing a spectroscopy for the DOS of phosphorus, the dopant of paramount importance in Si technology, through transport experiments. c 2006 The American Physical Society

	Ballistic Transport in Silicon Nanostructure
Silicon Nanoelectronics ed S. Oda and D. Ferry (Marcel Dekker Inc), p.105 (2005).
H. Mizuta, K. Nishiguchi, and S. Oda

	Charge-state control of phosphorous donors in silicon-on-insulator metal-oxide-semiconductor field-effect transistor
Jpn. J. Appl. Phys., vol. 44, p. 2588 (2005).
Y. Ono, A. Fujiwara, K. Nishiguchi, H. Inokawa, and Y. Takahashi
	[ABSTRACT] The drain current vs gate-voltage characteristics of a phosphorus-doped n-channel silicon-on-insulator metal-oxide-semiconductor field-effect transistor have been investigated. It was shown that, by controlling the voltage to the substrate at 20 K, the charge states of phosphorus donors can be changed in a controlled manner. Most of the donors are neutralized for the substrate voltage of around 0 V, while a major portion of the donors is ionized for a positive or negative voltage. Such a change can be detected by monitoring the change in the threshold voltage of the transistor. This is an experimental demonstration of the systematic control and monitoring of donor charge states in silicon.

	Nanocrystalline silicon electron emitter with a high efficiency enhanced by a planarization technique
J. Appl. Phys., vol. 92, pp. 2748-2757 (2002).
K. Nishiguchi, X. Zhao and S. Oda
	[ABSTRACT] A cold electron emitter has been fabricated based on nanocrystalline silicon (nc-Si) quantum dots formed in the gas phase by very-high-frequency plasma decomposition of SiH4. A small size of less than 10 nm and the spherical shape of the nc-Si dots facilitated the generation of hot electrons. Electrons with kinetic energies higher than the work function of the top electrode were extracted into vacuum through the electrode. A planarization process of the nc-Si layer by annealing enhanced the electron emission efficiency to 5%. Efficiency was optimized by varying the thicknesses of the nc-Si layer, the SiO2 layer, and the top electrode film. c 2002 American Institute of Physics.

	Ballistic transport in silicon vertical transistors
J. Appl. Phys., vol. 92, pp. 1399-1405 (2002).
K. Nishiguchi and S. Oda
	[ABSTRACT] Clear evidence for ballistic transport has been observed at 5 K from silicon vertical transistors with wrap around gates. The effect of channel shape was investigated experimentally and accounted for theoretically by the anisotropy of the Si conduction band. A reduction in conductance and the appearance of multiple steps were observed when a magnetic field was applied perpendicular to the channel. These results were successfully modeled within the effective mass approximation by including the magnetic vector potential and effects due to series resistance and the spin and valley degeneracy. c 2002 American Institute of Physics.

	A self-aligned two-gate single-electron transistor derived from 0.12μm lithography
Appl. Phys. Lett., vol. 78, pp. 2070-2072 (2001).
K. Nishiguchi and S. Oda
	[ABSTRACT] A single-electron transistor (SET) with two gates was fabricated via the self-aligned evaporation of Al into a trench structure comprised of Si and SiO2. The initial trench, which was comparable to 0.12 μm lines and defined by electron-beam lithography, was reduced to 0.05×0.02 μm by a slightly anisotropic etching characteristic. These processes allow for the production of SET devices using current silicon fabrication techniques. The simultaneous formation of two gates allows for one gate to be used to control the background charge of each device. The shift of Coulomb oscillation peaks was clearly shown by controlling the second gate bias. An inverter logic operation at a temperature of 5 K with a gain of 1.3 was obtained. These characteristics indicate that such SET logic devices, based on a combination of the good performance of the Al SET and the high level of control of the fabrication of Si technology, have considerable potential for future use. c 2001 American Institute of Physics.

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	Electron transport in a single silicon quantum structure using a vertical silicon probe
J. Appl. Phys., vol. 88, pp. 4186-4190 (2000).
K. Nishiguchi and S. Oda
	[ABSTRACT] We present a method of electrical measurement of single nanocrystalline silicon (nc-Si) particles fabricated by plasma-enhanced chemical vapor deposition (CVD) at very high frequency of 144 MHz. A vertical Si probe structure with a spheroidal shaped hole in SiO2 and a CVD grown polycrystalline Si electrode allows stable measurement of current through a single nc-Si quantum dot. Periodic Coulomb staircases are observed between 5 and 50 K. The temperature dependence of the differential conductance is consistent with these being electron transport through a double junction array. A Monte Carlo simulation further supports the double junction array model where a nc-Si quantum dot is covered by 1.5-nm-thick natural oxide as a tunnel barrier. Moreover, applying a wraparound gate makes it possible to observe Coulomb oscillation. c 2000 American Institute of Physics.

	Conductance quantization in nanoscale vertical-structure silicon field-effect transistors with a wrap gate
Appl. Phys. Lett, vol. 76, pp. 2922-2924 (2000)
K. Nishiguchi and S. Oda
	[ABSTRACT] Experimental results of quantum ballistic transport in single quantum contact by using vertical structure silicon field effect transistors with a wrap gate are presented. Based on dc measurement, the conductance」oltage characteristics show quantized plateaus at multiples of 2e^2/h. The devices were prepared by electron beam lithography and by combinations of various types of etching. The channel is fabricated by the chemical vapor deposition of amorphous silicon and solid-phase crystallization. The vertical structure allows a channel length as short as 30 nm, which is defined by the film thickness. The effective channel is reduced by the depletion potential, resulting in a much narrower channel width compared to the geometrical width of 60 nm. Thus, the effective size of the silicon transistor is smaller than the elastic mean free path of 40 nm, resulting in the conduction quantization at 3-5 K. c 2000 American Institute of Physics.